Metallic diffusion and/or drift between different metallic layers, or metallic and semiconductor layers induce changes over time in the properties of the layer into which diffusion and/or drift has occurred. These properties include electrical, mechanical, thermal, visual, physical and chemical properties. There is great importance to many industries to produce products having both constant properties over time and high reliability. These industries include, but are not limited to semiconductor, microelectronics, electro-finishing, aeronautic, space and motor industries. Products requiring high reliability include, for example, semiconductor chips, ULSI products, jewelry, nuts and bolts, and airplane wings and car parts. Typically, the smaller the product, the more pronounced an effect of a localized change in a property of a layer.
In the semiconductor industry, the diffusion of metals into adjacent layers is well documented. For example, copper diffuses into silicon materials. To prevent such diffusion, a barrier layer between the copper and silicon may be deposited (U.S. Pat. No. 5,695,810 to Dubin et al.).
The microelectronics industry constantly aims to reduce the size of components and the distance between interconnects, yet, simultaneously, tries to increase the number of electronic features per unit area. Thus, there is an increasing requirement for more accurate and well-controlled metal deposition techniques. For example, with decreasing size of copper/SiO2 interconnects, standard processes known in the art for metal deposition cannot typically meet the new requirements for precision. There is therefore an urgent need for better designed processes, materials and manufacturing methods for metal deposition.
One of the concerns in manufacturing and processing copper, amongst other metals, is its corrosion, before and after Chemical-Mechanical Polishing (CMP), which may induce deterioration in the electrical and mechanical properties of the copper. Another concern is the migration of copper onto the inter-level dielectric and the silicon substrate (see U.S. Pat. No. 5,674787 to Zhao, et al.) Copper contamination in inter-level dielectrics weakens the dielectrics' mechanical properties and reduces electrical reliability. Copper is also a deep level dopant in silicon, which may lower the minority carriers lifetime and may enhance leakage currents to significant levels.
Copper has poor adhesion to most dielectrics that are used in ULSI manufacturing, such as, but not limited to, SiO2, SiOF, polyimide and low-K dielectrics. Therefore, the implementation of a copper encapsulation method is desirable. One possible solution is to wrap the Cu lines with special thin metallic cladding that serves as a corrosion resistance layer; a diffusion barrier; and as a adhesion promoter.
There are many materials that are known to be good barrier to diffusion. Usually they are refractory metals, such as Ta, W and Mo, or refractory metal nitride thin films such as TiN, TaN, and WxNy. The layers can be deposited by conventional physical vapor deposition (PVD), chemical vapor deposition (CVD) or Atomic Layer Chemical Vapor Deposition (ALCVD).
Alternative methods for depositing barriers are electroplating and electroless (autocatalytic) deposition of metallic alloys (see U.S. Pat. No. 4,209,331 to Kukanskis, et al.).
There is therefore an urgent need to develop novel materials and methods for metallic deposition which overcome diffusion, drift and migration of metallic ions.